AndesCore-N1033A-S

Benefit
Performance
*Audio acceleration DSP extension
*Burst support for uncached load multiple
*Efficient atomic access synchronization without locking system bus
*Low latency vectored interrupt improving real-time performance
*Zero-wait-state local memory with 1D/2D DMA
*Low power mode
*MMU
**HW page table walker
**TLB management instructions
*MPU
**Memory protection regions

Flexibility
*Memory-mapped IO space
*PC-relative jumps for position independent code
*JTAG-based debug support
*Performance monitors for performance tuning
*Bi-endian data accesses

Power management
*Clock-gated pipeline
*Low-power mode support instructions

Applications
*PMP
*Music player
*DVD
*Game
*DSC
*Storage

General descriptions
N1033A-S is a synthesizable softcore of general purpose 32-bit embedded processor with DSP extension instructions. With those powerful instructions, N1033A-S can play compressed audio music with very low frequency and power.
Besides, N1033A-S comes with a variety of configuration options including MMU/MPU, cache and local memory. It can be applied for performance sensitive applications that running embedded Linux as well as cost and power sensitive applications that require small footprint or real-time OS and manageable power consumption.
N1033A-S is delivered with a complete development package for ease of integration in SoC design by its user-friendly configuration tool, simulation environment, as well as reference design flow to fit customer’s requirement in all aspects of performance, power consumption and core size.

Functional blocks

Key features
CPU core
*AndeStar™ V2 architecture
*16/32bit mixable instruction format
*32 general-purpose 32-bit registers
*5-stage pipeline
*Dynamic branch prediction with 32/64/128-entry BTB
*Multiply-Accumulate and Multiply-subtract instructions
*Post-increment aligned load/store single
*Aligned and unaligned load/store multiple
*Vector interrupts for internal/external interrupt controller
*3 HW-level nested interruptions
*User and super-user mode support
*Memory-mapped I/O and up to 4GB address space

Memory management unit
*TLB
**4/8-entry fully associative iTLB/dTLB
**32/64/128-entry 4-way set-associative main TLB
**TLB locking support
*Hardware page table walker
*Two groups of page size support
**4KB & 1MB
**8KB & 1MB

Memory protection unit
*8 memory protection regions

Memory subsystem
*I & D cache
**Virtually indexed and physically tagged
**Cache size: 4KB to 32KB
**Cache line size: 16B/32B
**Set associativity: 2 way
**I cache locking support
*I & D local memory (LM)
**Internal or external to CPU core and size up to 1MB
**Optional 1D/2D DMA engine

Bus interface
*Synchronous/Asynchronous AHB bus
*Port number: 1 AHB-lite, 1AHB, or 2AHB
(instruction port and data port)

Audio acceleration DSP extension
*Over 40 audio instructions
*Zero overhead loop mechanism
*Circular buffer mechanism
*Bit reversal addressing
*DSP-like X-Y data memory for parallel dual-load operations
*Single instruction multiple operations (SIMO)
*16-/24-/32- bit data integer/fixed-point data format
*Saturation
*12MHz for 128Kbps MP3 decode

Power management
*Power management instructions
*Clock-gated pipeline
*Software-programmable size/associativity reduction for caches, MTLB and BTB

Debug
*JTAG debug interface
*Embedded debug module (EDM)
*Optional embedded program tracer interface

Miscellaneous
*Programmable data endian control
*Performance monitoring mechanism

Development tools
N1033A-S supported by two advanced development tools
*AndeSight™ :
Integrated development environment
*AndESLive™ :
ESL integrated virtual environment