我這裡是使用"WebMatrix"開發平台,作為PHP與MySQL資料庫系統開發,因此當使用WebMatrix新增第一個"空白網頁"時,WebMatrix就會要求安裝MySQL Connector,之後再由Visual Studio IDE加入動態連結檔(MySql.Data.dll),之後就可以在VB程式中Imports MySQL相關的命名空間。
1. 選擇"專案" > "加入參考"。
2. 選擇"瀏覽"標籤欄,選擇"MySql.Data.dll"後,按"確定"。
完整路徑:"C:\Program Files\MySQL\MySQL Connector Net 6.5.4\Assemblies\v2.0"。
3. 最後在Visual Studio增加一個VB的程式專案,在程式中"Imports MySql.Data.MySqlClient", 其他的程式,請參考"MySQL Connector /Net Developer Guide"文件。
2014年12月13日 星期六
2014年11月19日 星期三
STM8S-Discovery_STM8S003F3-12_PWM
我參考了網路上其他網友的程式,使用GPIO的PC1輸出PWM信號,經過驗證可以正常執行。
使用示波器CH1量測GPIO的PC1輸出PWM信號如下圖所示。
1. 整個project的程式檔案目錄如下圖所示.
main.c
/*************************************************************/
#include "stm8s_003x.h"
#include "stm8s_type.h"
void InitPWM(void)
{
TIM1->ARRH = (u8)(1000 >> 8); //Auto-reload Hi-byte, 2mHz/1000 = 2kHz
TIM1->ARRL = (u8)(1000); //Auto-reload Lo-byte
TIM1->PSCRH = 0x00; //Prescaler Hi-byte, fCK_PSC/(PSCR[15:0]+1)
TIM1->PSCRL = 0x08; //Prescaler Lo-byte
TIM1->CCR1H = (u8)(200 >> 8); //Duty cycle Hi-byte
TIM1->CCR1L = (u8)(200); //Duty cycle Lo-byte
TIM1->CCMR1 |= 0x60; //PC1 pin is set becom the PWM output,PWM mode 1
TIM1->CCER1 |= 0x01; //Capture enabled
TIM1->IER = 0x00; //All interrupt disabled
TIM1->CR1 = 0x01; //Countrol enable
TIM1->BKR |= 0x80; //Enable PWM output
}
int main(void)
{
enableInterrupts(); //InterruptInit
InitPWM();
return 0;
}
stm8_interrupt_vector.c
/*************************************************************/
/***********************************************/
/* BASIC INTERRUPT VECTOR TABLE FOR STM8 devices
* Copyright (c) 2007 STMicroelectronics
*/
typedef void @far (*interrupt_handler_t)(void);
struct interrupt_vector {
unsigned char interrupt_instruction;
interrupt_handler_t interrupt_handler;
};
@far @interrupt void NonHandledInterrupt (void)
{
/* in order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction
*/
return;
}
extern void _stext(); /* startup routine */
struct interrupt_vector const _vectab[] = {
{0x82, (interrupt_handler_t)_stext}, /* reset */
{0x82, NonHandledInterrupt}, /* trap */
{0x82, NonHandledInterrupt}, /* irq0 */
{0x82, NonHandledInterrupt}, /* irq1 */
{0x82, NonHandledInterrupt}, /* irq2 */
{0x82, NonHandledInterrupt}, /* irq3 */
{0x82, NonHandledInterrupt}, /* irq4 */
{0x82, NonHandledInterrupt}, /* irq5 */
{0x82, NonHandledInterrupt}, /* irq6 */
{0x82, NonHandledInterrupt}, /* irq7 */
{0x82, NonHandledInterrupt}, /* irq8 */
{0x82, NonHandledInterrupt}, /* irq9 */
{0x82, NonHandledInterrupt}, /* irq10 */
{0x82, NonHandledInterrupt}, /* irq11 */
{0x82, NonHandledInterrupt}, /* irq12 */
{0x82, NonHandledInterrupt}, /* irq13 */
{0x82, NonHandledInterrupt}, /* irq14 */
{0x82, NonHandledInterrupt}, /* irq15 */
{0x82, NonHandledInterrupt}, /* irq16 */
{0x82, NonHandledInterrupt}, /* irq17 */
{0x82, NonHandledInterrupt}, /* irq18 */
{0x82, NonHandledInterrupt}, /* irq19 */
{0x82, NonHandledInterrupt}, /* irq20 */
{0x82, NonHandledInterrupt}, /* irq21 */
{0x82, NonHandledInterrupt}, /* irq22 */
{0x82, NonHandledInterrupt}, /* irq23 */
{0x82, NonHandledInterrupt}, /* irq24 */
{0x82, NonHandledInterrupt}, /* irq25 */
{0x82, NonHandledInterrupt}, /* irq26 */
{0x82, NonHandledInterrupt}, /* irq27 */
{0x82, NonHandledInterrupt}, /* irq28 */
{0x82, NonHandledInterrupt}, /* irq29 */
};
stm8s_003x.h
/*************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8_003x_H
#define __STM8_003x_H
#include "stm8s_type.h"
/******************************************************************************/
/* Library configuration section */
/******************************************************************************/
/******************************************************************************/
/* Peripherals Base Address */
/******************************************************************************/
#define GPIOA_BaseAddress 0x5000
#define GPIOB_BaseAddress 0x5005
#define GPIOC_BaseAddress 0x500A
#define GPIOD_BaseAddress 0x500F
#define GPIOE_BaseAddress 0x5014
#define GPIOF_BaseAddress 0x5019
#define FLASH_BaseAddress 0x505A
#define ITC_BaseAddress 0x50A0
#define RST_BaseAddress 0x50B3
#define CLK_BaseAddress 0x50C3
#define WWDG_BaseAddress 0x50D1
#define IWDG_BaseAddress 0x50E0
#define AWU_BaseAddress 0x50F0
#define BEEP_BaseAddress 0x50F3
#define SPI_BaseAddress 0x5200
#define I2C_BaseAddress 0x5210
#define UART1_BaseAddress 0x5230
#define TIM1_BaseAddress 0x5250
#define TIM2_BaseAddress 0x5300
#define TIM4_BaseAddress 0x5340
#define ADC1_BaseAddress 0x53E0
/******************************************************************************/
/* Peripherals declarations */
/******************************************************************************/
#define GPIOA ((GPIO_TypeDef *) GPIOA_BaseAddress)
#define GPIOB ((GPIO_TypeDef *) GPIOB_BaseAddress)
#define GPIOC ((GPIO_TypeDef *) GPIOC_BaseAddress)
#define GPIOD ((GPIO_TypeDef *) GPIOD_BaseAddress)
#define GPIOE ((GPIO_TypeDef *) GPIOE_BaseAddress)
#define GPIOF ((GPIO_TypeDef *) GPIOF_BaseAddress)
#define FLASH ((FLASH_TypeDef *) FLASH_BaseAddress)
#define ITC ((ITC_TypeDef *) ITC_BaseAddress)
#define RST ((RST_TypeDef *) RST_BaseAddress)
#define CLK ((CLK_TypeDef *) CLK_BaseAddress)
#define WWDG ((WWDG_TypeDef *) WWDG_BaseAddress)
#define IWDG ((IWDG_TypeDef *) IWDG_BaseAddress)
#define AWU ((AWU_TypeDef *) AWU_BaseAddress)
#define BEEP ((BEEP_TypeDef *) BEEP_BaseAddress)
#define SPI ((SPI_TypeDef *) SPI_BaseAddress)
#define I2C ((I2C_TypeDef *) I2C_BaseAddress)
#define UART1 ((UART1_TypeDef *) UART1_BaseAddress)
#define TIM1 ((TIM1_TypeDef *) TIM1_BaseAddress)
#define TIM2 ((TIM2_TypeDef *) TIM2_BaseAddress)
#define TIM4 ((TIM4_TypeDef *) TIM4_BaseAddress)
#define ADC1 ((ADC1_TypeDef *) ADC1_BaseAddress)
/******************************************************************************/
/* IP registers structures */
/******************************************************************************/
#define enableInterrupts() {_asm("rim\n");} /* enable interrupts */
#define disableInterrupts() {_asm("sim\n");} /* disable interrupts */
/* @brief General Purpose I/Os (GPIO) */
typedef struct GPIO_struct
{
vu8 ODR; /*!< Output Data Register */
vu8 IDR; /*!< Input Data Register */
vu8 DDR; /*!< Data Direction Register */
vu8 CR1; /*!< Configuration Register 1 */
vu8 CR2; /*!< Configuration Register 2 */
}GPIO_TypeDef;
/* @brief FLASH program and Data memory (FLASH) */
typedef struct FLASH_struct
{
vu8 CR1; /*!< Flash control register 1 */
vu8 CR2; /*!< Flash control register 2 */
vu8 NCR2; /*!< Flash complementary control register 2 */
vu8 FPR; /*!< Flash protection register */
vu8 NFPR; /*!< Flash complementary protection register */
vu8 IAPSR; /*!< Flash in-application programming status register */
u8 RESERVED1; /*!< Reserved byte */
u8 RESERVED2; /*!< Reserved byte */
vu8 PUKR; /*!< Flash program memory unprotection register */
u8 RESERVED3; /*!< Reserved byte */
vu8 DUKR; /*!< Data EEPROM unprotection register */
}FLASH_TypeDef;
/* @brief Interrupt Controller (ITC) */
typedef struct ITC_struct
{
vu8 CR1; /*!< External interrupt control register 1 */
vu8 CR2; /*!< External interrupt control register 2 */
}ITC_TypeDef;
/* @brief Reset Controller (RST) */
typedef struct RST_struct
{
vu8 SR; /*!< Reset status register */
}RST_TypeDef;
/* @brief Clock Controller (CLK) */
typedef struct CLK_struct
{
vu8 ICKR; /*!< Internal Clocks Control Register */
vu8 ECKR; /*!< External Clocks Control Register */
u8 RESERVED; /*!< Reserved byte */
vu8 CMSR; /*!< Clock Master Status Register */
vu8 SWR; /*!< Clock Master Switch Register */
vu8 SWCR; /*!< Switch Control Register */
vu8 CKDIVR; /*!< Clock Divider Register */
vu8 PCKENR1; /*!< Peripheral Clock Gating Register 1 */
vu8 CSSR; /*!< Clock Security Sytem Register */
vu8 CCOR; /*!< Configurable Clock Output Register */
vu8 PCKENR2; /*!< Peripheral Clock Gating Register 2 */
vu8 CANCCR; /*!< CAN external clock control Register (exist only in STM8S208 otherwise it is reserved) */
vu8 HSITRIMR; /*!< HSI Calibration Trimmer Register */
vu8 SWIMCCR; /*!< SWIM clock control register */
}CLK_TypeDef;
/* @brief Window Watchdog (WWDG) */
typedef struct WWDG_struct
{
vu8 CR; /*!< Control Register */
vu8 WR; /*!< Window Register */
}WWDG_TypeDef;
/* @brief Independent Watchdog (IWDG) */
typedef struct IWDG_struct
{
vu8 KR; /*!< Key Register */
vu8 PR; /*!< Prescaler Register */
vu8 RLR; /*!< Reload Register */
}IWDG_TypeDef;
/* @brief Auto Wake Up (AWU) peripheral registers. */
typedef struct AWU_struct
{
vu8 CSR; /*!< AWU Control status register */
vu8 APR; /*!< AWU Asynchronous prescaler buffer */
vu8 TBR; /*!< AWU Time base selection register */
}AWU_TypeDef;
/* @brief Beeper (BEEP) peripheral registers. */
typedef struct BEEP_struct
{
vu8 CSR; /*!< BEEP Control status register */
}BEEP_TypeDef;
/* @brief Serial Peripheral Interface (SPI) */
typedef struct SPI_struct
{
vu8 CR1; /*!< SPI control register 1 */
vu8 CR2; /*!< SPI control register 2 */
vu8 ICR; /*!< SPI interrupt control register */
vu8 SR; /*!< SPI status register */
vu8 DR; /*!< SPI data I/O register */
vu8 CRCPR; /*!< SPI CRC polynomial register */
vu8 RXCRCR; /*!< SPI Rx CRC register */
vu8 TXCRCR; /*!< SPI Tx CRC register */
}SPI_TypeDef;
/* @brief Inter-Integrated Circuit (I2C) */
typedef struct I2C_struct
{
vu8 CR1; /*!< I2C control register 1 */
vu8 CR2; /*!< I2C control register 2 */
vu8 FREQR; /*!< I2C frequency register */
vu8 OARL; /*!< I2C own address register LSB */
vu8 OARH; /*!< I2C own address register MSB */
u8 RESERVED1; /*!< Reserved byte */
vu8 DR; /*!< I2C data register */
vu8 SR1; /*!< I2C status register 1 */
vu8 SR2; /*!< I2C status register 2 */
vu8 SR3; /*!< I2C status register 3 */
vu8 ITR; /*!< I2C interrupt register */
vu8 CCRL; /*!< I2C clock control register low */
vu8 CCRH; /*!< I2C clock control register high */
vu8 TRISER; /*!< I2C maximum rise time register */
vu8 PECR; /*!< I2C packet error checking register */
}I2C_TypeDef;
/* @brief Universal Synchronous Asynchronous Receiver Transmitter (UART1) */
typedef struct UART1_struct
{
vu8 SR; /*!< UART1 status register */
vu8 DR; /*!< UART1 data register */
vu8 BRR1; /*!< UART1 baud rate register */
vu8 BRR2; /*!< UART1 DIV mantissa[11:8] SCIDIV fraction */
vu8 CR1; /*!< UART1 control register 1 */
vu8 CR2; /*!< UART1 control register 2 */
vu8 CR3; /*!< UART1 control register 3 */
vu8 CR4; /*!< UART1 control register 4 */
vu8 CR5; /*!< UART1 control register 5 */
vu8 CR6; /*!< UART1 control register 6 */
vu8 GTR; /*!< UART1 guard time register */
vu8 PSCR; /*!< UART1 prescaler register */
}UART1_TypeDef;
/* @brief 16-bit timer with complementary PWM outputs (TIM1) */
typedef struct TIM1_struct
{
vu8 CR1; /*!< control register 1 */
vu8 CR2; /*!< control register 2 */
vu8 SMCR; /*!< Synchro mode control register */
vu8 ETR; /*!< external trigger register */
vu8 IER; /*!< interrupt enable register*/
vu8 SR1; /*!< status register 1 */
vu8 SR2; /*!< status register 2 */
vu8 EGR; /*!< event generation register */
vu8 CCMR1; /*!< CC mode register 1 */
vu8 CCMR2; /*!< CC mode register 2 */
vu8 CCMR3; /*!< CC mode register 3 */
vu8 CCMR4; /*!< CC mode register 4 */
vu8 CCER1; /*!< CC enable register 1 */
vu8 CCER2; /*!< CC enable register 2 */
vu8 CNTRH; /*!< counter high */
vu8 CNTRL; /*!< counter low */
vu8 PSCRH; /*!< prescaler high */
vu8 PSCRL; /*!< prescaler low */
vu8 ARRH; /*!< auto-reload register high */
vu8 ARRL; /*!< auto-reload register low */
vu8 RCR; /*!< Repetition Counter register */
vu8 CCR1H; /*!< capture/compare register 1 high */
vu8 CCR1L; /*!< capture/compare register 1 low */
vu8 CCR2H; /*!< capture/compare register 2 high */
vu8 CCR2L; /*!< capture/compare register 2 low */
vu8 CCR3H; /*!< capture/compare register 3 high */
vu8 CCR3L; /*!< capture/compare register 3 low */
vu8 CCR4H; /*!< capture/compare register 3 high */
vu8 CCR4L; /*!< capture/compare register 3 low */
vu8 BKR; /*!< Break Register */
vu8 DTR; /*!< dead-time register */
vu8 OISR; /*!< Output idle register */
}TIM1_TypeDef;
/* @brief 16-bit timer (TIM2) */
typedef struct TIM2_struct
{
vu8 CR1; /*!< control register 1 */
u8 RESERVED1; /*!< Reserved register */
u8 RESERVED2; /*!< Reserved register */
vu8 IER; /*!< interrupt enable register */
vu8 SR1; /*!< status register 1 */
vu8 SR2; /*!< status register 2 */
vu8 EGR; /*!< event generation register */
vu8 CCMR1; /*!< CC mode register 1 */
vu8 CCMR2; /*!< CC mode register 2 */
vu8 CCMR3; /*!< CC mode register 3 */
vu8 CCER1; /*!< CC enable register 1 */
vu8 CCER2; /*!< CC enable register 2 */
vu8 CNTRH; /*!< counter high */
vu8 CNTRL; /*!< counter low */
vu8 PSCR; /*!< prescaler register */
vu8 ARRH; /*!< auto-reload register high */
vu8 ARRL; /*!< auto-reload register low */
vu8 CCR1H; /*!< capture/compare register 1 high */
vu8 CCR1L; /*!< capture/compare register 1 low */
vu8 CCR2H; /*!< capture/compare register 2 high */
vu8 CCR2L; /*!< capture/compare register 2 low */
vu8 CCR3H; /*!< capture/compare register 3 high */
vu8 CCR3L; /*!< capture/compare register 3 low */
}TIM2_TypeDef;
/* @brief 8-bit system timer (TIM4) */
typedef struct TIM4_struct
{
vu8 CR1; /*!< control register 1 */
u8 RESERVED1; /*!< Reserved1 byte */
u8 RESERVED2; /*!< Reserved2 byte */
vu8 IER; /*!< interrupt enable register */
vu8 SR; /*!< status register */
vu8 EGR; /*!< event generation register */
vu8 CNTR; /*!< counter register */
vu8 PSCR; /*!< prescaler register */
vu8 ARR; /*!< auto-reload register */
}TIM4_TypeDef;
/* @brief Analog to Digital Converter (ADC1) */
typedef struct ADC1_struct
{
vu8 DB0RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB0RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB1RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB1RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB2RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB2RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB3RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB3RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB4RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB4RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB5RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB5RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB6RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB6RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB7RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB7RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB8RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB8RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB9RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB9RL; /*!< ADC1 Data Buffer Register (LSB) */
u8 RESERVED[12]; /*!< Reserved byte */
vu8 CSR; /*!< ADC1 control status register */
vu8 CR1; /*!< ADC1 configuration register 1 */
vu8 CR2; /*!< ADC1 configuration register 2 */
vu8 CR3; /*!< ADC1 configuration register 3 */
vu8 DRH; /*!< ADC1 Data high */
vu8 DRL; /*!< ADC1 Data low */
vu8 TDRH; /*!< ADC1 Schmitt trigger disable register high */
vu8 TDRL; /*!< ADC1 Schmitt trigger disable register low */
vu8 HTRH; /*!< ADC1 high threshold register High*/
vu8 HTRL; /*!< ADC1 high threshold register Low*/
vu8 LTRH; /*!< ADC1 low threshold register high */
vu8 LTRL; /*!< ADC1 low threshold register low */
vu8 AWSRH; /*!< ADC1 watchdog status register high */
vu8 AWSRL; /*!< ADC1 watchdog status register low */
vu8 AWCRH; /*!< ADC1 watchdog control register high */
vu8 AWCRL; /*!< ADC1 watchdog control register low */
}ADC1_TypeDef;
#endif /* __STM8S_003x_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
stm8s_type.h
/*************************************************************/
/**
******************************************************************************
* @file stm8s_type.h
* @brief This file contains all common data types.
* @author STMicroelectronics - MCD Application Team
* @version V1.1.1
* @date 06/05/2009
******************************************************************************
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
* @image html logo.bmp
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_TYPE_H
#define __STM8S_TYPE_H
/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
typedef signed long s32;
typedef signed short s16;
typedef signed char s8;
typedef signed long const sc32; /* Read Only */
typedef signed short const sc16; /* Read Only */
typedef signed char const sc8; /* Read Only */
typedef volatile signed long vs32;
typedef volatile signed short vs16;
typedef volatile signed char vs8;
typedef volatile signed long const vsc32; /* Read Only */
typedef volatile signed short const vsc16; /* Read Only */
typedef volatile signed char const vsc8; /* Read Only */
typedef unsigned long u32;
typedef unsigned short u16;
typedef unsigned char u8;
typedef unsigned long const uc32; /* Read Only */
typedef unsigned short const uc16; /* Read Only */
typedef unsigned char const uc8; /* Read Only */
typedef volatile unsigned long vu32;
typedef volatile unsigned short vu16;
typedef volatile unsigned char vu8;
typedef volatile unsigned long const vuc32; /* Read Only */
typedef volatile unsigned short const vuc16; /* Read Only */
typedef volatile unsigned char const vuc8; /* Read Only */
typedef enum
{
FALSE = 0,
TRUE = !FALSE
}bool;
typedef enum
{
RESET = 0,
SET = !RESET
}FlagStatus, ITStatus, BitStatus;
typedef enum
{
DISABLE = 0,
ENABLE = !DISABLE
}FunctionalState;
#define IS_FUNCTIONALSTATE_OK(VALUE) ( (VALUE == ENABLE) || (VALUE == DISABLE) )
typedef enum
{
ERROR = 0,
SUCCESS = !ERROR
}ErrorStatus;
#define U8_MAX ((u8)255)
#define S8_MAX ((s8)127)
#define S8_MIN ((s8)-128)
#define U16_MAX ((u16)65535u)
#define S16_MAX ((s16)32767)
#define S16_MIN ((s16)-32768)
#define U32_MAX ((u32)4294967295uL)
#define S32_MAX ((s32)2147483647)
#define S32_MIN ((s32)-2147483648)
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
#endif /* __STM8S_TYPE_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
2014年10月9日 星期四
使用STM8S003F3點亮LCM模組(JDL0419A02-1)
JDL0419A02-1 LCM模組是深圳興宇合電子所生產的,驅動IC使用盛群半導體的HT1621驅動IC,我參考了網路上的範例,使用STM8S003F3 MCU成功點亮這個LCM模組。
1. 依照下圖接線,
LCM <-----> STM8S MCU
*******************
VDD <-----> 5V (紅線)
GND <-----> GND (綠線)
/CS <-----> PD0 (黑線)
/WR <-----> PD1 (棕線)
DATA<-----> PD2 (黃線)
HT1621驅動IC指令碼為 3'b100,
HT1621驅動IC指令碼時序如下圖所示,
HT1621驅動IC Data時序如下圖所示,Data的指令碼為3'b101。
2. 下圖的表格的SEG 對應程式因該是要從0~18才對,COM1 = 0x80,COM2 = 0x40,COM3 = 0x20,COM4 = 0x10。
3. 程式如下://*******************************main.c
#include "stm8s_003x.h"
#include "stm8s_type.h"
#include "gpio.h"
#include "delay.h"
#include "lcm.h"
void LCD_ObjectSendCommand(unsigned char Command)
{
unsigned char i,j = 0x01;
/*********** Send 100 (Command Mode) ***************/
LCM_BusLo(CS);
for(i = 0; i < 3; i++)
{
Delay_us(1);
LCM_BusLo(WR); //Clock
if(j & 0x01)
{
LCM_BusHi(Data);
}
else
{
LCM_BusLo(Data);
}
j >>= 1;
Delay_us(1);
LCM_BusHi(WR); //Clock
}
/*********** Send Command ***************/
j = Command;
for(i = 0; i < 8; i++)
{
Delay_us(1);
LCM_BusLo(WR); //Clock
if(j & 0x80)
{
LCM_BusHi(Data);
}
else
{
LCM_BusLo(Data);
}
j <<= 1;
Delay_us(1);
LCM_BusHi(WR); //Clock
}
j = 0;
for(i = 0; i < 1; i++)
{
Delay_us(1);
LCM_BusLo(WR); //Clock
if(j & 0x0f)
{
LCM_BusHi(Data);
}
else
{
LCM_BusLo(Data);
}
Delay_us(1);
LCM_BusHi(WR); //Clock
}
LCM_BusHi(CS);
}
void LCD_ObjectSendData(unsigned char Address, unsigned char HT1621_Data)
{
char i;
/********** send 101 (set write mode) ***************/
int CommandId = 5;
LCM_BusLo(CS);
for(i = 0; i < 3; i++)
{
Delay_us(1);
LCM_BusLo(WR); //Clock
if(CommandId & 0x01)
{
LCM_BusHi(Data);
}
else
{
LCM_BusLo(Data);
}
CommandId >>= 1;
Delay_us(1);
LCM_BusHi(WR); //Clock
}
/********** Send Address (6Bits) ***************/
for(i=0; i<6; i++)
{
Delay_us(1);
LCM_BusLo(WR); //Clock
if(Address & 0x20)
{
LCM_BusHi(Data);
}
else
{
LCM_BusLo(Data);
}
Delay_us(1);
Address <<= 1;
LCM_BusHi(WR); //Clock
}
/********** Send Data (4Bits) ***************/
for(i=0; i<4; i++)
{
Delay_us(1);
LCM_BusLo(WR); //Clock
if(HT1621_Data & 0x80)
{
LCM_BusHi(Data);
}
else
{
LCM_BusLo(Data);
}
Delay_us(1);
LCM_BusHi(WR); //Clock
HT1621_Data <<= 1;
}
LCM_BusHi(CS);
}
void LCD_ClearAll(void)
{
unsigned char i;
for(i = 0; i <= 0x1F; i ++)
{
LCD_ObjectSendData(i,0xFF); //Clear all LCD ON
}
for(i = 0; i <= 0x1F; i ++)
{
LCD_ObjectSendData(i,0x00); //Clear all LCD OFF
}
}
void HT1621_Inital(void)
{
LCD_ObjectSendCommand(LCD_SYS_EN); //Only init one time
LCD_ObjectSendCommand(LCD_LCD_ON);
LCD_ObjectSendCommand(LCD_RC_256);
LCD_ObjectSendCommand(LCD_IRQ_DIS);
LCD_ObjectSendCommand(LCD_BIAS);
LCD_ClearAll();
}
int main(void)
{
unsigned int n, x;
enableInterrupts(); //InterruptInit
GPIOD_OutputInit();
HT1621_Inital();
while(1)
{
for(n = 0; n < 20; n++)
{
LCD_ObjectSendData(0, 0x10); //Smart
Delay_ms(250);
LCD_ObjectSendData(0, 0x20); //Denomination
Delay_ms(250);
LCD_ObjectSendData(0, 0x40); //New version
Delay_ms(250);
LCD_ObjectSendData(0, 0x80); //Mixed point
Delay_ms(250);
LCD_ObjectSendData(0, 0x00); //SEG, COM //Clean
Delay_ms(250);
LCD_ObjectSendData(1, 0x80); //Add
Delay_ms(250);
LCD_ObjectSendData(1, 0x40); //UV
Delay_ms(250);
LCD_ObjectSendData(1, 0x20); //Count
Delay_ms(250);
LCD_ObjectSendData(1, 0x10); //Preset
Delay_ms(250);
LCD_ObjectSendData(1, 0x00); //SEG, COM //Clean
Delay_ms(250);
//////////////////////////////////////////////_NO_1
LCD_ObjectSendData(2, 0x00); //SEG, COM //No1_Clean word
LCD_ObjectSendData(3, 0x00); //SEG, COM
Delay_ms(250);
LCD_ObjectSendData(2, 0xA0); //SEG, COM //No1_0
LCD_ObjectSendData(3, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //No1_1
LCD_ObjectSendData(3, 0x60);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
LCD_ObjectSendData(2, 0xC0); //SEG, COM //No1_2
LCD_ObjectSendData(3, 0xB0);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
LCD_ObjectSendData(2, 0x40); //SEG, COM //No1_3
LCD_ObjectSendData(3, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
LCD_ObjectSendData(2, 0x60); //SEG, COM //No1_4
LCD_ObjectSendData(3, 0x60);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
LCD_ObjectSendData(2, 0x60); //SEG, COM //No1_5
LCD_ObjectSendData(3, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
LCD_ObjectSendData(2, 0xE0); //SEG, COM //No1_6
LCD_ObjectSendData(3, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
LCD_ObjectSendData(2, 0x20); //SEG, COM //No1_7
LCD_ObjectSendData(3, 0x70);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
LCD_ObjectSendData(2, 0xE0); //SEG, COM //No1_8
LCD_ObjectSendData(3, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
LCD_ObjectSendData(2, 0x60); //SEG, COM //No1_9
LCD_ObjectSendData(3, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(2, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(3, 0x00);
Delay_ms(250);
//////////////////////////////////////////////_NO_2
LCD_ObjectSendData(4, 0x00); //SEG, COM //No1_Clean word
LCD_ObjectSendData(5, 0x00); //SEG, COM
Delay_ms(250);
LCD_ObjectSendData(4, 0xA0); //SEG, COM //No2_0
LCD_ObjectSendData(5, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //No2_1
LCD_ObjectSendData(5, 0x60);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
LCD_ObjectSendData(4, 0xC0); //SEG, COM //No2_2
LCD_ObjectSendData(5, 0xB0);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
LCD_ObjectSendData(4, 0x40); //SEG, COM //No2_3
LCD_ObjectSendData(5, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
LCD_ObjectSendData(4, 0x60); //SEG, COM //No2_4
LCD_ObjectSendData(5, 0x60);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
LCD_ObjectSendData(4, 0x60); //SEG, COM //No2_5
LCD_ObjectSendData(5, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
LCD_ObjectSendData(4, 0xE0); //SEG, COM //No2_6
LCD_ObjectSendData(5, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
LCD_ObjectSendData(4, 0x20); //SEG, COM //No2_7
LCD_ObjectSendData(5, 0x70);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
LCD_ObjectSendData(4, 0xE0); //SEG, COM //No2_8
LCD_ObjectSendData(5, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
LCD_ObjectSendData(4, 0x60); //SEG, COM //No2_9
LCD_ObjectSendData(5, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(4, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(5, 0x00);
Delay_ms(250);
//////////////////////////////////////////////_NO_3
LCD_ObjectSendData(6, 0x00); //SEG, COM //No1_Clean word
LCD_ObjectSendData(7, 0x00); //SEG, COM
Delay_ms(250);
LCD_ObjectSendData(6, 0xA0); //SEG, COM //No3_0
LCD_ObjectSendData(7, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //No3_1
LCD_ObjectSendData(7, 0x60);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
LCD_ObjectSendData(6, 0xC0); //SEG, COM //No3_2
LCD_ObjectSendData(7, 0xB0);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
LCD_ObjectSendData(6, 0x40); //SEG, COM //No3_3
LCD_ObjectSendData(7, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
LCD_ObjectSendData(6, 0x60); //SEG, COM //No3_4
LCD_ObjectSendData(7, 0x60);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
LCD_ObjectSendData(6, 0x60); //SEG, COM //No3_5
LCD_ObjectSendData(7, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
LCD_ObjectSendData(6, 0xE0); //SEG, COM //No3_6
LCD_ObjectSendData(7, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
LCD_ObjectSendData(6, 0x20); //SEG, COM //No3_7
LCD_ObjectSendData(7, 0x70);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
LCD_ObjectSendData(6, 0xE0); //SEG, COM //No3_8
LCD_ObjectSendData(7, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
LCD_ObjectSendData(6, 0x60); //SEG, COM //No3_9
LCD_ObjectSendData(7, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(6, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(7, 0x00);
Delay_ms(250);
//////////////////////////////////////////////_NO_4
LCD_ObjectSendData(8, 0x00); //SEG, COM //No1_Clean word
LCD_ObjectSendData(9, 0x00); //SEG, COM
Delay_ms(250);
LCD_ObjectSendData(8, 0xA0); //SEG, COM //No4_0
LCD_ObjectSendData(9, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //No4_1
LCD_ObjectSendData(9, 0x60);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
LCD_ObjectSendData(8, 0xC0); //SEG, COM //No4_2
LCD_ObjectSendData(9, 0xB0);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
LCD_ObjectSendData(8, 0x40); //SEG, COM //No4_3
LCD_ObjectSendData(9, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
LCD_ObjectSendData(8, 0x60); //SEG, COM //No4_4
LCD_ObjectSendData(9, 0x60);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
LCD_ObjectSendData(8, 0x60); //SEG, COM //No4_5
LCD_ObjectSendData(9, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
LCD_ObjectSendData(8, 0xE0); //SEG, COM //No4_6
LCD_ObjectSendData(9, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
LCD_ObjectSendData(8, 0x20); //SEG, COM //No4_7
LCD_ObjectSendData(9, 0x70);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
LCD_ObjectSendData(8, 0xE0); //SEG, COM //No4_8
LCD_ObjectSendData(9, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
LCD_ObjectSendData(8, 0x60); //SEG, COM //No4_9
LCD_ObjectSendData(9, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(8, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(9, 0x00);
Delay_ms(250);
//////////////////////////////////////////////_NO_5
LCD_ObjectSendData(10, 0x00); //SEG, COM //No1_Clean word
LCD_ObjectSendData(11, 0x00); //SEG, COM
Delay_ms(250);
LCD_ObjectSendData(10, 0xA0); //SEG, COM //No5_0
LCD_ObjectSendData(11, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //No5_1
LCD_ObjectSendData(11, 0x60);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
LCD_ObjectSendData(10, 0xC0); //SEG, COM //No5_2
LCD_ObjectSendData(11, 0xB0);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
LCD_ObjectSendData(10, 0x40); //SEG, COM //No5_3
LCD_ObjectSendData(11, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
LCD_ObjectSendData(10, 0x60); //SEG, COM //No5_4
LCD_ObjectSendData(11, 0x60);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
LCD_ObjectSendData(10, 0x60); //SEG, COM //No5_5
LCD_ObjectSendData(11, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
LCD_ObjectSendData(10, 0xE0); //SEG, COM //No5_6
LCD_ObjectSendData(11, 0xD0);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
LCD_ObjectSendData(10, 0x20); //SEG, COM //No5_7
LCD_ObjectSendData(11, 0x70);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
LCD_ObjectSendData(10, 0xE0); //SEG, COM //No5_8
LCD_ObjectSendData(11, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
LCD_ObjectSendData(10, 0x60); //SEG, COM //No5_9
LCD_ObjectSendData(11, 0xF0);
Delay_ms(250);
LCD_ObjectSendData(10, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(11, 0x00);
Delay_ms(250);
//////////////////////////////////////////////_NO_6
LCD_ObjectSendData(12, 0x00); //SEG, COM //No1_Clean word
LCD_ObjectSendData(13, 0x00); //SEG, COM
Delay_ms(250);
LCD_ObjectSendData(12, 0xF0); //SEG, COM //No6_0
LCD_ObjectSendData(13, 0x50);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0x60); //SEG, COM //No6_1
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0xD0); //SEG, COM //No6_2
LCD_ObjectSendData(13, 0x30);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0xF0); //SEG, COM //No6_3
LCD_ObjectSendData(13, 0x20);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0x60); //SEG, COM //No6_4
LCD_ObjectSendData(13, 0x60);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0xB0); //SEG, COM //No6_5
LCD_ObjectSendData(13, 0x60);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0xB0); //SEG, COM //No6_6
LCD_ObjectSendData(13, 0x70);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0xE0); //SEG, COM //No6_7
LCD_ObjectSendData(13, 0x40);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0xF0); //SEG, COM //No6_8
LCD_ObjectSendData(13, 0x70);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
LCD_ObjectSendData(12, 0xF0); //SEG, COM //No6_9
LCD_ObjectSendData(13, 0x60);
Delay_ms(250);
LCD_ObjectSendData(12, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(13, 0x00);
Delay_ms(250);
//////////////////////////////////////////////_NO_7
LCD_ObjectSendData(14, 0x00); //SEG, COM //No1_Clean word
LCD_ObjectSendData(15, 0x00); //SEG, COM
Delay_ms(250);
LCD_ObjectSendData(14, 0xF0); //SEG, COM //No7_0
LCD_ObjectSendData(15, 0x50);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0x60); //SEG, COM //No7_1
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0xD0); //SEG, COM //No7_2
LCD_ObjectSendData(15, 0x30);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0xF0); //SEG, COM //No7_3
LCD_ObjectSendData(15, 0x20);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0x60); //SEG, COM //No7_4
LCD_ObjectSendData(15, 0x60);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0xB0); //SEG, COM //No7_5
LCD_ObjectSendData(15, 0x60);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0xB0); //SEG, COM //No7_6
LCD_ObjectSendData(15, 0x70);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0xE0); //SEG, COM //No7_7
LCD_ObjectSendData(15, 0x40);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0xF0); //SEG, COM //No7_8
LCD_ObjectSendData(15, 0x70);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
LCD_ObjectSendData(14, 0xF0); //SEG, COM //No7_9
LCD_ObjectSendData(15, 0x60);
Delay_ms(250);
LCD_ObjectSendData(14, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(15, 0x00);
Delay_ms(250);
//////////////////////////////////////////////_NO_8
LCD_ObjectSendData(16, 0x00); //SEG, COM //No1_Clean word
LCD_ObjectSendData(17, 0x00); //SEG, COM
Delay_ms(250);
LCD_ObjectSendData(16, 0xF0); //SEG, COM //No8_0
LCD_ObjectSendData(17, 0x50);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0x60); //SEG, COM //No8_1
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0xD0); //SEG, COM //No8_2
LCD_ObjectSendData(17, 0x30);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0xF0); //SEG, COM //No8_3
LCD_ObjectSendData(17, 0x20);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0x60); //SEG, COM //No8_4
LCD_ObjectSendData(17, 0x60);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0xB0); //SEG, COM //No8_5
LCD_ObjectSendData(17, 0x60);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0xB0); //SEG, COM //No8_6
LCD_ObjectSendData(17, 0x70);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0xE0); //SEG, COM //No8_7
LCD_ObjectSendData(17, 0x40);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0xF0); //SEG, COM //No8_8
LCD_ObjectSendData(17, 0x70);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
LCD_ObjectSendData(16, 0xF0); //SEG, COM //No8_9
LCD_ObjectSendData(17, 0x60);
Delay_ms(250);
LCD_ObjectSendData(16, 0x00); //SEG, COM //Clean
LCD_ObjectSendData(17, 0x00);
Delay_ms(250);
//////////////////////////////////////////////S1~S4
LCD_ObjectSendData(18, 0x10); //SEG, COM //S1
Delay_ms(250);
LCD_ObjectSendData(18, 0x20); //SEG, COM //S2
Delay_ms(250);
LCD_ObjectSendData(18, 0x40); //SEG, COM //S3
Delay_ms(250);
LCD_ObjectSendData(18, 0x80); //SEG, COM //S4
Delay_ms(250);
LCD_ObjectSendData(18, 0x00); //SEG, COM //Clean
Delay_ms(250);
}
}
return 0;
}
#include "stm8s_003x.h"
#include "stm8s_type.h"
#include "delay.h"
// Delay 1000 = 2s
// Delay 500 = 1s
// Delay 100 = 200ms
// Delay 50 = 100ms
// Delay 10 = 20ms
// Delay 5 = 10ms
// Delay 1 = 2ms
void Delay_ms(int x)
{
int i, j;
for (i=0; i<x; i++)
for (j=1; j<=150; j++);
}
void Delay_us(int x)
{
_asm("NOP");
}
#include "stm8s_003x.h"
#include "stm8s_type.h"
#include "gpio.h"
void GPIOD_OutputInit(void)
{
GPIOD->DDR |= 0x07;
GPIOD->CR1 |= 0x07;
GPIOD->ODR |= 0x07;
}
//*******************************stm8_interrupt_vector.c
/***********************************************/
/* BASIC INTERRUPT VECTOR TABLE FOR STM8 devices
* Copyright (c) 2007 STMicroelectronics
*/
typedef void @far (*interrupt_handler_t)(void);
struct interrupt_vector {
unsigned char interrupt_instruction;
interrupt_handler_t interrupt_handler;
};
@far @interrupt void NonHandledInterrupt (void)
{
/* in order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction
*/
return;
}
extern void _stext(); /* startup routine */
struct interrupt_vector const _vectab[] = {
{0x82, (interrupt_handler_t)_stext}, /* reset */
{0x82, NonHandledInterrupt}, /* trap */
{0x82, NonHandledInterrupt}, /* irq0 */
{0x82, NonHandledInterrupt}, /* irq1 */
{0x82, NonHandledInterrupt}, /* irq2 */
{0x82, NonHandledInterrupt}, /* irq3 */
{0x82, NonHandledInterrupt}, /* irq4 */
{0x82, NonHandledInterrupt}, /* irq5 */
{0x82, NonHandledInterrupt}, /* irq6 */
{0x82, NonHandledInterrupt}, /* irq7 */
{0x82, NonHandledInterrupt}, /* irq8 */
{0x82, NonHandledInterrupt}, /* irq9 */
{0x82, NonHandledInterrupt}, /* irq10 */
{0x82, NonHandledInterrupt}, /* irq11 */
{0x82, NonHandledInterrupt}, /* irq12 */
{0x82, NonHandledInterrupt}, /* irq13 */
{0x82, NonHandledInterrupt}, /* irq14 */
{0x82, NonHandledInterrupt}, /* irq15 */
{0x82, NonHandledInterrupt}, /* irq16 */
{0x82, NonHandledInterrupt}, /* irq17 */
{0x82, NonHandledInterrupt}, /* irq18 */
{0x82, NonHandledInterrupt}, /* irq19 */
{0x82, NonHandledInterrupt}, /* irq20 */
{0x82, NonHandledInterrupt}, /* irq21 */
{0x82, NonHandledInterrupt}, /* irq22 */
{0x82, NonHandledInterrupt}, /* irq23 */
{0x82, NonHandledInterrupt}, /* irq24 */
{0x82, NonHandledInterrupt}, /* irq25 */
{0x82, NonHandledInterrupt}, /* irq26 */
{0x82, NonHandledInterrupt}, /* irq27 */
{0x82, NonHandledInterrupt}, /* irq28 */
{0x82, NonHandledInterrupt}, /* irq29 */
};
#include "stm8s_type.h"
void Delay_ms(int x);
void Delay_us(int x);
//*******************************gpio.h
#include "stm8s_type.h"
//STM8s003x_LD1
#define LED1 0x01
#define CS 0x01
#define WR 0x02
#define Data 0x04
#define LED_on(msk) GPIOD->ODR &= ~(msk);
#define LED_off(msk) GPIOD->ODR |= (msk);
#define LCM_BusLo(Run_msk) GPIOD->ODR &= ~(Run_msk);
#define LCM_BusHi(Run_msk) GPIOD->ODR |= (Run_msk);
void GPIOD_OutputInit(void);
#include "stm8s_type.h"
#define LCD_SYS_EN 0x01 /*turn on system oscillator*/
#define LCD_LCD_ON 0x03 /*trun on LCD bias generator*/
#define LCD_RC_256 0x18 /*on-chip RC oscillator*/
#define LCD_IRQ_DIS 0x80 /*disable IRQ output*/
#define LCD_BIAS 0x29 /*4COM & LCD 1/3 bias option */
#define LCD_TIMER_DIS 0x008 /*disable time base output*/
#define LCD_WDT_DIS 0x00A /*disable WDT time_out flag output*/
#define LCD_TONE_OFF 0x010 /*turn off tone output*/
#define LCD_TONE_ON 0x012 /*turn on tone output*/
#define LCD_NORMAL 0x1C6 /*normal mode*/
#define LCD_COMMAND 0x04 /*write command id to 1621*/
#define LCD_WRITE 0x05 /*write date/addr id to 1621*/
//*******************************stm8s_003x.h
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8_003x_H
#define __STM8_003x_H
#include "stm8s_type.h"
/******************************************************************************/
/* Library configuration section */
/******************************************************************************/
/******************************************************************************/
/* Peripherals Base Address */
/******************************************************************************/
#define GPIOA_BaseAddress 0x5000
#define GPIOB_BaseAddress 0x5005
#define GPIOC_BaseAddress 0x500A
#define GPIOD_BaseAddress 0x500F
#define GPIOE_BaseAddress 0x5014
#define GPIOF_BaseAddress 0x5019
#define FLASH_BaseAddress 0x505A
#define ITC_BaseAddress 0x50A0
#define RST_BaseAddress 0x50B3
#define CLK_BaseAddress 0x50C3
#define WWDG_BaseAddress 0x50D1
#define IWDG_BaseAddress 0x50E0
#define AWU_BaseAddress 0x50F0
#define BEEP_BaseAddress 0x50F3
#define SPI_BaseAddress 0x5200
#define I2C_BaseAddress 0x5210
#define UART1_BaseAddress 0x5230
#define TIM1_BaseAddress 0x5250
#define TIM2_BaseAddress 0x5300
#define TIM4_BaseAddress 0x5340
#define ADC1_BaseAddress 0x53E0
/******************************************************************************/
/* Peripherals declarations */
/******************************************************************************/
#define GPIOA ((GPIO_TypeDef *) GPIOA_BaseAddress)
#define GPIOB ((GPIO_TypeDef *) GPIOB_BaseAddress)
#define GPIOC ((GPIO_TypeDef *) GPIOC_BaseAddress)
#define GPIOD ((GPIO_TypeDef *) GPIOD_BaseAddress)
#define GPIOE ((GPIO_TypeDef *) GPIOE_BaseAddress)
#define GPIOF ((GPIO_TypeDef *) GPIOF_BaseAddress)
#define FLASH ((FLASH_TypeDef *) FLASH_BaseAddress)
#define ITC ((ITC_TypeDef *) ITC_BaseAddress)
#define RST ((RST_TypeDef *) RST_BaseAddress)
#define CLK ((CLK_TypeDef *) CLK_BaseAddress)
#define WWDG ((WWDG_TypeDef *) WWDG_BaseAddress)
#define IWDG ((IWDG_TypeDef *) IWDG_BaseAddress)
#define AWU ((AWU_TypeDef *) AWU_BaseAddress)
#define BEEP ((BEEP_TypeDef *) BEEP_BaseAddress)
#define SPI ((SPI_TypeDef *) SPI_BaseAddress)
#define I2C ((I2C_TypeDef *) I2C_BaseAddress)
#define UART1 ((UART1_TypeDef *) UART1_BaseAddress)
#define TIM1 ((TIM1_TypeDef *) TIM1_BaseAddress)
#define TIM2 ((TIM2_TypeDef *) TIM2_BaseAddress)
#define TIM4 ((TIM4_TypeDef *) TIM4_BaseAddress)
#define ADC1 ((ADC1_TypeDef *) ADC1_BaseAddress)
/******************************************************************************/
/* IP registers structures */
/******************************************************************************/
#define enableInterrupts() {_asm("rim\n");} /* enable interrupts */
#define disableInterrupts() {_asm("sim\n");} /* disable interrupts */
/* @brief General Purpose I/Os (GPIO) */
typedef struct GPIO_struct
{
vu8 ODR; /*!< Output Data Register */
vu8 IDR; /*!< Input Data Register */
vu8 DDR; /*!< Data Direction Register */
vu8 CR1; /*!< Configuration Register 1 */
vu8 CR2; /*!< Configuration Register 2 */
}GPIO_TypeDef;
/* @brief FLASH program and Data memory (FLASH) */
typedef struct FLASH_struct
{
vu8 CR1; /*!< Flash control register 1 */
vu8 CR2; /*!< Flash control register 2 */
vu8 NCR2; /*!< Flash complementary control register 2 */
vu8 FPR; /*!< Flash protection register */
vu8 NFPR; /*!< Flash complementary protection register */
vu8 IAPSR; /*!< Flash in-application programming status register */
u8 RESERVED1; /*!< Reserved byte */
u8 RESERVED2; /*!< Reserved byte */
vu8 PUKR; /*!< Flash program memory unprotection register */
u8 RESERVED3; /*!< Reserved byte */
vu8 DUKR; /*!< Data EEPROM unprotection register */
}FLASH_TypeDef;
/* @brief Interrupt Controller (ITC) */
typedef struct ITC_struct
{
vu8 CR1; /*!< External interrupt control register 1 */
vu8 CR2; /*!< External interrupt control register 2 */
}ITC_TypeDef;
/* @brief Reset Controller (RST) */
typedef struct RST_struct
{
vu8 SR; /*!< Reset status register */
}RST_TypeDef;
/* @brief Clock Controller (CLK) */
typedef struct CLK_struct
{
vu8 ICKR; /*!< Internal Clocks Control Register */
vu8 ECKR; /*!< External Clocks Control Register */
u8 RESERVED; /*!< Reserved byte */
vu8 CMSR; /*!< Clock Master Status Register */
vu8 SWR; /*!< Clock Master Switch Register */
vu8 SWCR; /*!< Switch Control Register */
vu8 CKDIVR; /*!< Clock Divider Register */
vu8 PCKENR1; /*!< Peripheral Clock Gating Register 1 */
vu8 CSSR; /*!< Clock Security Sytem Register */
vu8 CCOR; /*!< Configurable Clock Output Register */
vu8 PCKENR2; /*!< Peripheral Clock Gating Register 2 */
vu8 CANCCR; /*!< CAN external clock control Register (exist only in STM8S208 otherwise it is reserved) */
vu8 HSITRIMR; /*!< HSI Calibration Trimmer Register */
vu8 SWIMCCR; /*!< SWIM clock control register */
}CLK_TypeDef;
/* @brief Window Watchdog (WWDG) */
typedef struct WWDG_struct
{
vu8 CR; /*!< Control Register */
vu8 WR; /*!< Window Register */
}WWDG_TypeDef;
/* @brief Independent Watchdog (IWDG) */
typedef struct IWDG_struct
{
vu8 KR; /*!< Key Register */
vu8 PR; /*!< Prescaler Register */
vu8 RLR; /*!< Reload Register */
}IWDG_TypeDef;
/* @brief Auto Wake Up (AWU) peripheral registers. */
typedef struct AWU_struct
{
vu8 CSR; /*!< AWU Control status register */
vu8 APR; /*!< AWU Asynchronous prescaler buffer */
vu8 TBR; /*!< AWU Time base selection register */
}AWU_TypeDef;
/* @brief Beeper (BEEP) peripheral registers. */
typedef struct BEEP_struct
{
vu8 CSR; /*!< BEEP Control status register */
}BEEP_TypeDef;
/* @brief Serial Peripheral Interface (SPI) */
typedef struct SPI_struct
{
vu8 CR1; /*!< SPI control register 1 */
vu8 CR2; /*!< SPI control register 2 */
vu8 ICR; /*!< SPI interrupt control register */
vu8 SR; /*!< SPI status register */
vu8 DR; /*!< SPI data I/O register */
vu8 CRCPR; /*!< SPI CRC polynomial register */
vu8 RXCRCR; /*!< SPI Rx CRC register */
vu8 TXCRCR; /*!< SPI Tx CRC register */
}SPI_TypeDef;
/* @brief Inter-Integrated Circuit (I2C) */
typedef struct I2C_struct
{
vu8 CR1; /*!< I2C control register 1 */
vu8 CR2; /*!< I2C control register 2 */
vu8 FREQR; /*!< I2C frequency register */
vu8 OARL; /*!< I2C own address register LSB */
vu8 OARH; /*!< I2C own address register MSB */
u8 RESERVED1; /*!< Reserved byte */
vu8 DR; /*!< I2C data register */
vu8 SR1; /*!< I2C status register 1 */
vu8 SR2; /*!< I2C status register 2 */
vu8 SR3; /*!< I2C status register 3 */
vu8 ITR; /*!< I2C interrupt register */
vu8 CCRL; /*!< I2C clock control register low */
vu8 CCRH; /*!< I2C clock control register high */
vu8 TRISER; /*!< I2C maximum rise time register */
vu8 PECR; /*!< I2C packet error checking register */
}I2C_TypeDef;
/* @brief Universal Synchronous Asynchronous Receiver Transmitter (UART1) */
typedef struct UART1_struct
{
vu8 SR; /*!< UART1 status register */
vu8 DR; /*!< UART1 data register */
vu8 BRR1; /*!< UART1 baud rate register */
vu8 BRR2; /*!< UART1 DIV mantissa[11:8] SCIDIV fraction */
vu8 CR1; /*!< UART1 control register 1 */
vu8 CR2; /*!< UART1 control register 2 */
vu8 CR3; /*!< UART1 control register 3 */
vu8 CR4; /*!< UART1 control register 4 */
vu8 CR5; /*!< UART1 control register 5 */
vu8 CR6; /*!< UART1 control register 6 */
vu8 GTR; /*!< UART1 guard time register */
vu8 PSCR; /*!< UART1 prescaler register */
}UART1_TypeDef;
/* @brief 16-bit timer with complementary PWM outputs (TIM1) */
typedef struct TIM1_struct
{
vu8 CR1; /*!< control register 1 */
vu8 CR2; /*!< control register 2 */
vu8 SMCR; /*!< Synchro mode control register */
vu8 ETR; /*!< external trigger register */
vu8 IER; /*!< interrupt enable register*/
vu8 SR1; /*!< status register 1 */
vu8 SR2; /*!< status register 2 */
vu8 EGR; /*!< event generation register */
vu8 CCMR1; /*!< CC mode register 1 */
vu8 CCMR2; /*!< CC mode register 2 */
vu8 CCMR3; /*!< CC mode register 3 */
vu8 CCMR4; /*!< CC mode register 4 */
vu8 CCER1; /*!< CC enable register 1 */
vu8 CCER2; /*!< CC enable register 2 */
vu8 CNTRH; /*!< counter high */
vu8 CNTRL; /*!< counter low */
vu8 PSCRH; /*!< prescaler high */
vu8 PSCRL; /*!< prescaler low */
vu8 ARRH; /*!< auto-reload register high */
vu8 ARRL; /*!< auto-reload register low */
vu8 RCR; /*!< Repetition Counter register */
vu8 CCR1H; /*!< capture/compare register 1 high */
vu8 CCR1L; /*!< capture/compare register 1 low */
vu8 CCR2H; /*!< capture/compare register 2 high */
vu8 CCR2L; /*!< capture/compare register 2 low */
vu8 CCR3H; /*!< capture/compare register 3 high */
vu8 CCR3L; /*!< capture/compare register 3 low */
vu8 CCR4H; /*!< capture/compare register 3 high */
vu8 CCR4L; /*!< capture/compare register 3 low */
vu8 BKR; /*!< Break Register */
vu8 DTR; /*!< dead-time register */
vu8 OISR; /*!< Output idle register */
}TIM1_TypeDef;
/* @brief 16-bit timer (TIM2) */
typedef struct TIM2_struct
{
vu8 CR1; /*!< control register 1 */
u8 RESERVED1; /*!< Reserved register */
u8 RESERVED2; /*!< Reserved register */
vu8 IER; /*!< interrupt enable register */
vu8 SR1; /*!< status register 1 */
vu8 SR2; /*!< status register 2 */
vu8 EGR; /*!< event generation register */
vu8 CCMR1; /*!< CC mode register 1 */
vu8 CCMR2; /*!< CC mode register 2 */
vu8 CCMR3; /*!< CC mode register 3 */
vu8 CCER1; /*!< CC enable register 1 */
vu8 CCER2; /*!< CC enable register 2 */
vu8 CNTRH; /*!< counter high */
vu8 CNTRL; /*!< counter low */
vu8 PSCR; /*!< prescaler register */
vu8 ARRH; /*!< auto-reload register high */
vu8 ARRL; /*!< auto-reload register low */
vu8 CCR1H; /*!< capture/compare register 1 high */
vu8 CCR1L; /*!< capture/compare register 1 low */
vu8 CCR2H; /*!< capture/compare register 2 high */
vu8 CCR2L; /*!< capture/compare register 2 low */
vu8 CCR3H; /*!< capture/compare register 3 high */
vu8 CCR3L; /*!< capture/compare register 3 low */
}TIM2_TypeDef;
/* @brief 8-bit system timer (TIM4) */
typedef struct TIM4_struct
{
vu8 CR1; /*!< control register 1 */
u8 RESERVED1; /*!< Reserved1 byte */
u8 RESERVED2; /*!< Reserved2 byte */
vu8 IER; /*!< interrupt enable register */
vu8 SR; /*!< status register */
vu8 EGR; /*!< event generation register */
vu8 CNTR; /*!< counter register */
vu8 PSCR; /*!< prescaler register */
vu8 ARR; /*!< auto-reload register */
}TIM4_TypeDef;
/* @brief Analog to Digital Converter (ADC1) */
typedef struct ADC1_struct
{
vu8 DB0RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB0RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB1RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB1RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB2RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB2RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB3RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB3RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB4RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB4RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB5RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB5RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB6RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB6RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB7RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB7RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB8RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB8RL; /*!< ADC1 Data Buffer Register (LSB) */
vu8 DB9RH; /*!< ADC1 Data Buffer Register (MSB) */
vu8 DB9RL; /*!< ADC1 Data Buffer Register (LSB) */
u8 RESERVED[12]; /*!< Reserved byte */
vu8 CSR; /*!< ADC1 control status register */
vu8 CR1; /*!< ADC1 configuration register 1 */
vu8 CR2; /*!< ADC1 configuration register 2 */
vu8 CR3; /*!< ADC1 configuration register 3 */
vu8 DRH; /*!< ADC1 Data high */
vu8 DRL; /*!< ADC1 Data low */
vu8 TDRH; /*!< ADC1 Schmitt trigger disable register high */
vu8 TDRL; /*!< ADC1 Schmitt trigger disable register low */
vu8 HTRH; /*!< ADC1 high threshold register High*/
vu8 HTRL; /*!< ADC1 high threshold register Low*/
vu8 LTRH; /*!< ADC1 low threshold register high */
vu8 LTRL; /*!< ADC1 low threshold register low */
vu8 AWSRH; /*!< ADC1 watchdog status register high */
vu8 AWSRL; /*!< ADC1 watchdog status register low */
vu8 AWCRH; /*!< ADC1 watchdog control register high */
vu8 AWCRL; /*!< ADC1 watchdog control register low */
}ADC1_TypeDef;
#endif /* __STM8S_003x_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
/**
******************************************************************************
* @file stm8s_type.h
* @brief This file contains all common data types.
* @author STMicroelectronics - MCD Application Team
* @version V1.1.1
* @date 06/05/2009
******************************************************************************
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
* @image html logo.bmp
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_TYPE_H
#define __STM8S_TYPE_H
/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
typedef signed long s32;
typedef signed short s16;
typedef signed char s8;
typedef signed long const sc32; /* Read Only */
typedef signed short const sc16; /* Read Only */
typedef signed char const sc8; /* Read Only */
typedef volatile signed long vs32;
typedef volatile signed short vs16;
typedef volatile signed char vs8;
typedef volatile signed long const vsc32; /* Read Only */
typedef volatile signed short const vsc16; /* Read Only */
typedef volatile signed char const vsc8; /* Read Only */
typedef unsigned long u32;
typedef unsigned short u16;
typedef unsigned char u8;
typedef unsigned long const uc32; /* Read Only */
typedef unsigned short const uc16; /* Read Only */
typedef unsigned char const uc8; /* Read Only */
typedef volatile unsigned long vu32;
typedef volatile unsigned short vu16;
typedef volatile unsigned char vu8;
typedef volatile unsigned long const vuc32; /* Read Only */
typedef volatile unsigned short const vuc16; /* Read Only */
typedef volatile unsigned char const vuc8; /* Read Only */
typedef enum
{
FALSE = 0,
TRUE = !FALSE
}bool;
typedef enum
{
RESET = 0,
SET = !RESET
}FlagStatus, ITStatus, BitStatus;
typedef enum
{
DISABLE = 0,
ENABLE = !DISABLE
}FunctionalState;
#define IS_FUNCTIONALSTATE_OK(VALUE) ( (VALUE == ENABLE) || (VALUE == DISABLE) )
typedef enum
{
ERROR = 0,
SUCCESS = !ERROR
}ErrorStatus;
#define U8_MAX ((u8)255)
#define S8_MAX ((s8)127)
#define S8_MIN ((s8)-128)
#define U16_MAX ((u16)65535u)
#define S16_MAX ((s16)32767)
#define S16_MIN ((s16)-32768)
#define U32_MAX ((u32)4294967295uL)
#define S32_MAX ((s32)2147483647)
#define S32_MIN ((s32)-2147483648)
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
#endif /* __STM8S_TYPE_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
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