Tanner 16.3 S-Edit

使用S-EDIT設計電路:

增加Library :
C:\..\Tanner\Tanner Tools v16.3\Process\Generic_250nm\Generic_250nm_AnalogLib\Generic_250nm_AnalogLib.tanner

C:\..\Tanner\Tanner Tools v16.3\Process\Standard_Libraries\SPICE_Elements\SPICE_Elements.tanner

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呼叫T-Sice模擬信號:

設定SPICE Simulation:
點選"Setup" > SPICE Simulation.

(1). General > Simulation Outputs > Enable Waveform Voltage Probing:
True

(2). General > File and Directory Names > Library File:
C:\..\Tanner\Tanner Tools v16.3\Process\Generic_250nm\Generic_250nm_Tech\Generic_250nm.lib TT
(必須加入TT)

(3). 勾選"Transient/Fourier Analysis"，
Stop Time: 100ns
Maximum Time Step: 0.1ns

完成模擬後,使用S-EDIT,選擇File > Export > Export SPICE...,將設計好的電路轉成.spc檔.

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使用L-EDIT Layout電路:

(1). 新增專案,設定專案存檔路徑,選擇"TDB",並增加函示庫.
C:\..\Tanner\Tanner Tools v16.3\Process\Generic_250nm\Generic_250nm_Tech\Generic_250nm_TechSetup.tdb

(2). 增加函示庫,選擇Setup > Design... > Libraries,在Path欄位中選擇
C:\..\Tanner\Tanner Tools v16.3\Process\Generic_250nm\Generic_250nm_Tech\Generic_250nm_TechSetup.tdb

(3). 建立新的Cell,選擇 Cell > New...,修改名稱與上述S-EDIT創建名稱相同.

(4). 選擇Tools > SDL Navigator > Load Netlist,
在"Netlist"標籤欄中選擇Import Netlist(.spc)檔案,並勾選
Include substrate terminals of semiconductor devices in netlist

之後在"Layout"標籤欄中勾選
Add instances for missing subcircuits
Add instances of T-Cells for missing devices
Add missing I/O ports

Create New Ports
Layer: Metal1
Size: .35

Update parameters of T-cells